Hardware & Silicon Validation Senior Staff Engineer

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact The Custom Cloud Solutions (CCS) Hardware Validation Group is responsible for ensuring the quality, reliability, and performance of next generation data center ASIC and SoC products spanning a diverse portfolio that includes cloud infrastructure, AI accelerators, network processors, NICs, custom ASICs, SSD controllers, CXL devices, and domain specific accelerators. The team owns end to end hardware validation, working across the product lifecycle from early silicon bring up through system level qualification. Our scope includes functional hardware validation, electrical characterization, high speed SERDES validation, and system/platform validation, all executed in advanced, fully instrumented hardware labs. The group validates complex, high performance silicon and platforms across a wide range of critical technologies and interfaces, including Memory Subsystems (DDR, HBM, memory controllers), High Speed Interconnects (PCIe, Ethernet, CPRI, PAM4/NRZ), D2D interconnects, Storage, and IO (Flash and NVME, SSD controllers, USB) and System and Platform testing. What You Can Expect We are seeking a highly skilled and experienced Board Design Engineer to lead the architecture, design, and development of high‑performance hardware platforms. This role is critical to delivering robust, scalable solutions for compute, networking, and storage systems. The ideal candidate brings deep expertise in high‑speed digital design, including signal integrity (SI), power integrity (PI), schematic design, and advanced PCB layout. You will serve as a technical leader at the board level, defining system architecture, guiding design execution, and ensuring optimal performance and reliability across complex hardware systems. This role also requires close collaboration with cross‑functional teams and direct engagement with customers on reference designs. Key Responsibilities: • Architect and design high‑performance board‑level systems for compute, networking, and storage applications, driving from concept through production. • Define, review, and approve schematics and PCB layouts, with strong emphasis on signal integrity, power integrity, and high‑speed design best practices. • Lead the selection, implementation, and optimization of high‑speed interfaces, including PCIe Gen6, DDR4 / DDR5, 10G / 25G / 100G / 200G Ethernet • Perform and interpret signal integrity (SI) and power integrity (PI) simulations and analyses using industry‑standard tools such as HyperLynx, Sigrity, ADS, or equivalent platforms. • Collaborate closely with silicon, firmware, mechanical, thermal, validation, and manufacturing teams to ensure system‑level design optimization and seamless integration. • Drive design and architecture reviews, providing technical leadership and mentorship throughout the entire product development lifecycle. • Partner with manufacturing and test teams to ensure designs meet DFM/DFT requirements and enable efficient, reliable board bring‑up and production ramp. • Engage directly with customers to develop and support reference designs, incorporating feedback to influence architecture and design decisions. • Identify and proactively mitigate technical risks, ensuring performance, reliability, and schedule targets are met. What We're Looking For • Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 5–10 years of relevant industry experience; or Master’s degree and/or PhD in Computer Science, Electrical Engineering, or a related discipline with 3–5 years of professional experience. • Strong understanding of PCB design fundamentals, including schematic capture, component placement, routing, stack‑up definition, and design for manufacturability (DFM) and testability (DFT). • Experience with industry‑standard EDA tools for board design (e.g., Cadence Allegro/OrCAD, Altium Designer, Mentor Xpedition, or equivalent). • Solid knowledge of high‑speed digital design concepts, including controlled‑impedance routing, signal integrity, timing constraints, and differential pair routing. • Ability to interpret datasheets, reference designs, and electrical specifications to implement robust and compliant board designs. • Hands‑on experience supporting board bring‑up and debug, working closely with validation, silicon, and system teams. • Familiarity with power integrity, PDN design, decoupling strategies, and low‑noise analog layout techniques is desirable • Experience designing boards incorporating high‑speed interfaces such as PCIe, USB, Ethernet, DDR memory, or SerDes technologies is desirable. • Exposure to board‑level simulation or analysis tools for signal integrity (SI), power integrity (PI), or thermal analysis is desirable. • Strong problem‑solving and analytical skills, with attention to detail in complex designs. • Effective written and verbal communication skills, with the ability to collaborate across cross‑functional and global teams. • Demonstrated ability to work independently and collaboratively in a fast‑paced, multitasking engineering environment. Expected Base Pay Range (USD) 127,630 - 191,200, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Element